Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Reexamination Certificate
2005-10-26
2009-10-06
Butler, Dennis M (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
C713S400000, C713S501000
Reexamination Certificate
active
07600145
ABSTRACT:
Methods and apparatus to provide a clustered variations-aware architecture are described. In one embodiment, one or more variations within a clock domain are detected and utilized to adjust a clock signal of the clock domain.
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Ergin Oguz
Gonzalez Antonio
Unsal Osman
Vera Xavier
Butler Dennis M
Caven & Aghevle LLC
Intel Corporation
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