Clocking architecture in stacked and bonded dice

Details Clocking architecture in stacked and bonded dice Clocking architecture in stacked and bonded dice

2011-08-02

2011-08-02

Kebede, Brook (Department: 2894)

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Interconnecting plural devices on semiconductor substrate

C327S296000

Reexamination Certificate

active

07989226

ABSTRACT:
A method and apparatus for distributing clock signals throughout an integrated circuit is provided. An embodiment comprises a distribution die which contains either the clock signal distribution network by itself, or the clock signal distribution network in tandem with a clock signal generator. The distribution die is electrically connected through an interface technology, such as microbumps, to route the clock signals to the functional circuits on a separate functional die. Alternatively, the distribution die could be electrically connected to more than one die at a time, using vias through the distribution die to route the clock signals to the different die. This separate distribution die reduces the coupling between lines and also helps to prevent signal skew as the signal moves through the distribution network.

REFERENCES:
patent: 5177594 (1993-01-01), Chance et al.
patent: 5783870 (1998-07-01), Mostafazadeh et al.
patent: 6125217 (2000-09-01), Paniccia et al.
patent: 6730540 (2004-05-01), Siniaguine
patent: 6856170 (2005-02-01), Itoh

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