Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-03-28
2006-03-28
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C375S354000, C327S141000
Reexamination Certificate
active
07020791
ABSTRACT:
A system and method for synchronizing a local clock to a reference clock using a linear model of the clock error between the local clock and the reference clock is disclosed. In one embodiment, a double-exponential smoothing process is used in conjunction with the linear model to estimate a frequency offset by which the frequency of an oscillator of the local clock is adjusted. Also disclosed herein is a phased-lock loop (PLL) adapted to synchronize a local clock with a reference clock using the double-exponential smoothing process, as well as a system implementing the PLL for timing the playout of data received from a transmitter.
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Aweya James
Felske Kent E.
Montuno Delfin Y.
Ouellette Michel
Hunton & Williams LLP
Nortel Networks Limited
Suryawanshi Suresh K
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