Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Patent
1998-05-13
2000-04-11
Butler, Dennis M.
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
713503, G06F 112
Patent
active
060498862
ABSTRACT:
Disclosed is a clock frequency synchronizer which receives a count value of system clock on an encoder side which is transmitted from the encoder as a reference count value, and generates system clock on a decoder side which is synchronous in frequency with the system clock on the encoder side on the basis of the reference count value. A counting means for counting the system clocks on the decoder side is provided, and the deviation of the frequency of the system clock on the decoder side from that of the system clock on the encoder side is obtained by using an increment .DELTA.C of the count value of the counting means during reference count value arrival interval .DELTA.T and the increment .DELTA.P of the reference count value. The frequency of the system clock on the decoder side is so controlled that the frequency deviation becomes zero.
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Butler Dennis M.
Fujitsu Limited
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