Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2006-01-24
2006-01-24
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Addressing
Multiple port access
C365S230060, C365S233100
Reexamination Certificate
active
06990038
ABSTRACT:
A multi-port (e.g., two port) CMOS static random access memory (SRAM) with a local clock driver generating clocks for boundary latches. Local clocks select between address inputs clocked into the boundary latches. A read clock selects and latches a read address in the boundary latches. A second clock latches write addresses and, when appropriate, test data addresses.
REFERENCES:
patent: 4573119 (1986-02-01), Westheimer et al.
patent: 6029235 (2000-02-01), Morgan
patent: 6134639 (2000-10-01), Morgan
patent: 6643807 (2003-11-01), Heaslip et al.
Chan Yuen H.
Charest Timothy J.
Joshi Rajiv V.
Sautter Rolf
Dinh Son T.
International Business Machines Corp.
Karra, Esq. Satheesh K.
Law Office of Charles W. Peterson, Jr.
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