Clock domain crossing

Details Clock domain crossing Clock domain crossing

2005-09-30

2008-11-11

Elamin, Abdelmoniem (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

C713S401000, C713S500000, C713S501000, C713S502000, C713S503000, C713S600000, C713S601000, C370S503000, C327S144000, C327S145000

Reexamination Certificate

active

07451338

ABSTRACT:
Provided are a method, system, and device to effectuate a transfer of data from one clock domain to another. In accordance with one aspect of the description provided herein, bits of data to be transferred are shifted in the first clock domain. The shifted bits of data to be transferred may be sampled in a second clock domain at a fixed time within each clock signal of the first clock domain. A stream of sampled bits may be output in the second clock domain. Additional embodiments are described and claimed.

REFERENCES:
patent: 5915107 (1999-06-01), Maley et al.
patent: 6009107 (1999-12-01), Arvidsson et al.
patent: 6049887 (2000-04-01), Khandekar et al.
patent: 6311285 (2001-10-01), Rodriguez et al.

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