Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2007-06-25
2010-12-28
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S503000, C714S704000
Reexamination Certificate
active
07861105
ABSTRACT:
The present invention provides a method and mechanism for data recovery with phase synchronized clock using interpolator and timing loop module and a data latching circuit. The interpolator can be considered as a programmable delay circuit with a specified delay resolution over the clock period.
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International Search Report and Written Opinion of the International Searching Authority Dated Jun. 24, 2008, International Application No. PCT/US2008/002565.
Hao Jianbin
Ke Yanjing
Zhu Ning
Analogix Semiconductor, Inc.
Blakely , Sokoloff, Taylor & Zafman LLP
Cao Chun
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