Cleaning contact with successive fluorine and hydrogen plasmas

Details Cleaning contact with successive fluorine and hydrogen plasmas Cleaning contact with successive fluorine and hydrogen plasmas

1999-09-03

2001-11-06

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S706000, C438S906000, C438S655000, C438S656000, C438S664000

Reexamination Certificate

active

06313042

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to methods of removing native oxide from a contact area on a semiconductor or metal layer before depositing a metal plug over the area. More specifically, the invention relates to such a method including a step of cleaning the contact area using a fluorine-containing plasma, followed by a step of removing any fluorine residue by exposing the contact area to a hydrogen-containing plasma.
BACKGROUND OF THE INVENTION
A common process sequence in manufacturing integrated circuits and other electronic devices is to deposit a dielectric layer over a semiconductor or metal region on a substrate, then etch a number of openings in the dielectric so that each opening exposes a contact area on the semiconductor or metal region, then deposit a metal plug in each opening so as to make electrical contact with the contact area. If the substrate is exposed to the ambient atmosphere or any other source of oxygen after the openings are formed, the surface of the semiconductor or metal layer exposed in each opening will become oxidized. This native oxide must be removed or “cleaned” before depositing the metal plug in order to achieve good electrical contact between the plug and the contact area.
One conventional method of cleaning native oxide from a silicon layer before depositing a tungsten plug is plasma cleaning with a mixture of argon and NF
3
, as described in commonly assigned U.S. Pat. No. 5,043,299 issued to Chang et al. on Aug 27, 1991. However, because this cleaning process includes argon, it is unsuitable for certain dielectrics or shallow semiconductor junctions which can be damaged by argon sputtering.
Another problem exists when the contact area is on a semiconductor region such as silicon. In order to make good electrical contact between a metal plug and the semiconductor region, it typically is necessary to deposit over the contact area a layer of refractory metal, and then anneal the workpiece so that atoms of the semiconductor material and the refractory metal interdiffuse to form a compound such as, when the semiconductor is silicon, a refractory metal silicide. The anneal temperatures required to achieve a low resistance electrical contact typically are high enough to produce undesirable diffusion of the refractory metal into the semiconductor layer or the dielectric.
SUMMARY OF THE INVENTION
The invention is a method of cleaning a contact area of a semiconductor or metal region on a substrate of an electronic device. First, the contact area is cleaned by exposing the substrate to a first atmosphere formed by plasma decomposition of at least one fluorine-containing gas. Second, the substrate is exposed to a second atmosphere that scavenges fluorine. The second atmosphere preferably is formed by plasma decomposition of at least one hydrogen-containing gas. The second atmosphere removes any fluorine residue remaining on the contact area and overcomes any need to include argon sputtering in the cleaning process.
Another aspect of the invention is a method of depositing a refractory metal over a contact area of a semiconductor region on a substrate. The contact area is cleaned according to the two-step process of the preceding paragraph. Then a refractory metal is deposited over the contact area. We have discovered that our two-step cleaning process can reduce the electrical resistance between the refractory metal and the semiconductor region. Furthermore, if the substrate is annealed to interdiffuse atoms of the semiconductor material and the refractory metal, we have discovered that our two-step cleaning process can reduce the anneal temperature required to achieve a desired low electrical resistance.


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