Cladded read-write conductor for a pinned-on-the-fly soft...

Details Cladded read-write conductor for a pinned-on-the-fly soft... Cladded read-write conductor for a pinned-on-the-fly soft...

2001-04-02

2002-06-11

Elms, Richard (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetic thin film

C365S171000

Reexamination Certificate

active

06404674

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to a magnetic memory cell with a soft ferromagnetic reference layer including a non-pinned orientation of magnetization and a wholly clad read-write conductor. More specifically, the present invention relates to a magnetic memory cell with a soft ferromagnetic reference layer having a non-pinned orientation of magnetization and including a read-write conductor that is completely surrounded by a ferromagnetic cladding so that a read magnetic field generated by a current flowing in the read-write conductor does not saturate and is substantially contained within the ferromagnetic cladding so that the orientation of magnetization is dynamically pinned-on-the fly during a read operation to the memory cell and a write magnetic field generated by a current flowing in the read-write conductor that saturates the ferromagnetic cladding and extends outward of the ferromagnetic cladding to interact with a data layer during a write operation to the memory cell.
BACKGROUND ART
A magnetic memory such as a magnetic random access memory (MRAM) is a non-volatile type of memory that is being considered as an alternative data storage device in applications where traditional data storage devices such as DRAM, SRAM, Flash, and hard disk drives have been used. An MRAM typically includes an array of magnetic memory cells. For instance, a prior magnetic memory cell can be a tunneling magnetoresistance memory cell (TMR), a giant magnetoresistance memory cell (GMR), or a colossal magnetoresistance memory cell (CMR) that includes a data layer (also called a storage layer or bit layer), a reference layer, and an intermediate layer between the data layer and the reference layer. The data layer, the reference layer, and the intermediate layer can be made from one or more layers of material. The data layer is usually a layer or a film of magnetic material that stores a bit of data as an orientation of magnetization that may be altered in response to the application of external magnetic fields. Accordingly, the orientation of magnetization of the data layer (i.e. its logic state) can be rotated (i.e. switched) from a first orientation of magnetization that can represent a logic “0”, to a second orientation of magnetization that can represent a logic “1”, or vice-versa. On the other hand, the reference layer is usually a layer of magnetic material in which an orientation of magnetization is “pinned” (i.e. fixed) in a predetermined direction. The predetermined direction is determined by microelectronic processing steps that are used to fabricate the magnetic memory cell.
Typically, the logic state (i.e. a “0” or a “1 ”) of a magnetic memory cell depends on the relative orientations of magnetization in the data layer and the reference layer. For example, in a tunneling magnetoresistance memory cell (a tunnel junction memory cell), when an electrical potential bias is applied across the data layer and the reference layer, electrons migrate between the data layer and the reference layer through the intermediate layer (a thin dielectric layer usually called a tunnel barrier layer). The phenomenon that causes the migration of electrons through the barrier layer may be referred to as quantum mechanical tunneling or spin tunneling, The logic state can be determined by measuring the resistance of the memory cell. For example, the magnetic memory cell is in a state of low resistance if the overall orientation of magnetization in its data storage layer is parallel to the pinned orientation of magnetization of the reference layer. Conversely, the tunneling junction memory cell is in a state of high resistance if the overall orientation of magnetization in its data storage layer is anti-parallel to the pinned orientation of magnetization of the reference layer. As was mentioned above, the logic state of a bit stored in a magnetic memory cell is written by applying external magnetic fields that alter the overall orientation of magnetization of the data layer. Those external magnetic fields may be referred to as switching fields that switch the magnetic memory cell between its high and low resistance states.
FIG. 1
illustrates a prior tunnel junction memory cell
100
that includes a data layer
110
, a reference layer
112
, and an insulating barrier layer
114
that is positioned between the data layer
110
and the reference layer
112
. Additionally, the memory cell
100
can include a first electrically conductive node
116
connected with the data layer
110
and a second electrically conductive node
118
connected with the reference layer
112
. An externally supplied current can be passed through the first and second electrically conductive nodes (
116
,
118
) to generate the aforementioned external magnetic fields. The first and second electrically conductive nodes (
116
,
118
) can be the row and column conductors in a memory array that includes a plurality of the memory cells
100
as will be discussed in reference to
FIGS. 4
a
and
4
b
below. The nodes can also be used to measure the resistance of the memory cell
100
so that its logic state can be determined. The reference layer
112
has an orientation of magnetization M
1
that is pinned in a predetermined direction as illustrated by a left-pointing arrow. The data layer
110
has an alterable orientation of magnetization M
2
as illustrated by the double arrow.
In
FIG. 2
a
, the orientation of magnetization M
2
of the data layer
110
is parallel (i.e. the arrows point in the same direction) to the orientation of magnetization Ml of the reference layer
112
, resulting in the memory cell
100
being in a low resistance state. On the other hand, in
FIG. 2
b
, the orientation of magnetization M
2
of the data layer
110
is anti-parallel (i.e. the arrows point in opposite directions) to the orientation of magnetization M
1
of the reference layer
112
, resulting in the memory cell
100
being in a high resistance state.
Because the data layer
110
and the reference layer
112
are made from ferromagnetic materials that are positioned in close proximity to each other, the pinned orientation of magnetization M
1
of the reference layer
112
generates a demagnetization field D that extends from an edge domain of the reference layer
112
to the data layer
110
as illustrated in
FIG. 2
c
.
FIG. 2
d
illustrates the effect of the demagnetization field D on the orientation of magnetization M
2
of the data layer
110
. Ideally, the orientation of magnetization of the data layer
110
would have an alignment that is either parallel or anti-parallel to the pinned orientation of magnetization M
1
. However, because of the demagnetization field D, there is a small angular displacement &thgr; between an ideal orientation of magnetization M
2
′ (shown as a dashed arrow) and an actual orientation of magnetization M
2
(shown by a solid arrow). The angular displacement &thgr; results in a reduction in a magnitude of change in magnetoresistance &Dgr;R/R between the high and low states (i.e. parallel or anti-parallel). It is desirable to have the magnitude of change in magnetoresistance &Dgr;R/R be as large as possible so that it is easier to detect the state of the bit in the data layer
110
. Essentially, &Dgr;R/R is like a signal-to-noise ratio S/N. During a read operation, a higher S/N results in a stronger signal that can be sensed to determine the state of the bit in the data layer
110
. Therefore, one disadvantage of the prior tunnel junction memory cell
100
is the reduction in the magnitude of change in magnetoresistance &Dgr;R/R (i.e. a lower S/N during a read operation) resulting from the angular displacement
8
.
Another disadvantage of the prior tunnel junction memory cell
100
is that pinning the orientation of magnetization M
1
of the reference layer
112
often requires more than one layer of material to effectuate the pinning. For instance, in
FIG. 3
a
, a prior tunnel junction memory cell
200
includes the aforementioned data layer
210
, first and second electrically

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