Circuits, systems and methods for modifying data stored in a mem

Details Circuits, systems and methods for modifying data stored in a mem Circuits, systems and methods for modifying data stored in a mem

1997-07-30

1999-06-08

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523006, G11C 800

Patent

active

059109190

ABSTRACT:
A memory system 104 includes an array 200 of memory calls arranged in rows and columns and circuitry 208 for selectively performing logic operations on a bit of data stored in a selected call using a bit of received modifying data and a mode data bit for selecting a logic operation for performance. Circuitry 208 for modifying during an OR logic operation writing bit of the modifying data into the cell when the bit of modifying data is a logic one and maintaining an existing bit stored in call when the bit of modifying data is a logic zero. Memory system 104 further includes circuitry 207, 210 for receiving and latching the mode data and the modifying data through a single port.

REFERENCES:
patent: 5195056 (1993-03-01), Pinkham
patent: 5432743 (1995-07-01), Kusakari
"Patent Abstracts of Japan" vol. 18, No. 264, p. 1740 on May 19, 1994. Abstract JP A06036555
"Patent Abstracts of Japan" vol. 18, No. 333, p. 1759 on Jun. 23, 1994 Abstract No. JP A06076565.

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