Circuits and methods for testing FPGA routing switches

Details Circuits and methods for testing FPGA routing switches Circuits and methods for testing FPGA routing switches

2011-04-05

2011-04-05

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

With test facilitating feature

C326S041000, C326S047000

Reexamination Certificate

active

07919977

ABSTRACT:
An FPGA architecture includes multiplexers having non-volatile switches having control gates coupled to word lines W, each word line associated with a row, the switches connecting to wiring tracks through buffers having a controllable ground connection NGND, at least some of the switches being a tie-off switch coupleable to one of a plurality of bitlines B, each bitline associated with column.

REFERENCES:
patent: 6949951 (2005-09-01), Young et al.
patent: 7471104 (2008-12-01), Chirania

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