Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1993-07-30
1994-12-27
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36523008, 365900, G11C 1300
Patent
active
053771451
ABSTRACT:
A status register in a non-volatile semiconductor memory is described. The status register outputs to pins of the non-volatile semiconductor memory a number of signals that indicate the status of program and erase operations performed on the memory array of the non-volatile semiconductor memory. The status register includes a clock circuit that generates a clock signal in response to an output enable signal. The clock signal is coupled to a pair of latches that respond by coupling their signals to the pins. One latch couples an erase fail signal to a pin to indicate whether the memory array has been sucessfully erased. The other latch couples a program fail signal to a pin to indicate whether an addressed memory cell of the memory array has been sucessfully programmed.
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Fandrich Mickey L.
Kynett Virgil N.
Fears Terrell W.
Intel Corporation
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