Circuit having logic state retention during power-down and...

Details Circuit having logic state retention during power-down and... Circuit having logic state retention during power-down and...

2008-01-30

2009-11-17

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

C326S112000, C326S119000

Reexamination Certificate

active

07619440

ABSTRACT:
A storage circuit has an input for receiving and storing data, a first power terminal coupled to a first conductor for receiving a first power supply voltage, and a second power terminal coupled to a second conductor. A power gate device has a first terminal coupled to the second conductor, a control terminal for receiving a bias voltage in response to a control signal, and a second terminal coupled to a terminal for receiving a second power supply voltage. A shorting device selectively electrically short circuits the first terminal of the power gate device to the control terminal of the power gate device in response to the control signal, thereby converting the power gate device from a transistor into a diode-connected device. The shorting device is smaller in size than the power gate device.

REFERENCES:
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patent: 6049245 (2000-04-01), Son et al.
patent: 6476641 (2002-11-01), Yoshida
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patent: 7126370 (2006-10-01), Bhattacharya
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patent: 2004/0227542 (2004-11-01), Bhavnagarwala et al.
patent: 2007/0121358 (2007-05-01), Hirota et al.

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