Circuit for the improvement of semiconductor memories

Details Circuit for the improvement of semiconductor memories Circuit for the improvement of semiconductor memories

1976-02-13

1977-11-01

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365183, 365 73, G11C 1140

Patent

active

040568113

ABSTRACT:
The memory cells in the rows of a random access memory are divided in to subrows, and an access transistor is used selectively isolate or connect the output terminals of each subrow of memory cells to the row line. When recalling the datum from a memory cell, the subrow is isolated, and thus the loading of the output signal from that memory cell is reduced. Consequently, an improved output signal can be obtained from a memory cell with a given size storage capacitance, or a smaller storage capacitance can be used in the memory cell, or both.

REFERENCES:
patent: 3914750 (1975-10-01), Hadden

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