Circuit for power management of standard cell application

Details Circuit for power management of standard cell application Circuit for power management of standard cell application

2007-02-27

2007-02-27

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S033000, C326S119000

Reexamination Certificate

active

10898786

ABSTRACT:
A power management circuit for logic cells. A logic cell is operated in normal or standby modes according to a power control signal. The logic cell includes an output terminal and a power input terminal. A switch is coupled between a power voltage, the power control signal and the power input terminal. That switch is turned off to disconnect the power voltage and the logic cell when the power control signal is at a predetermined level. This results in the logic cell operating in standby mode. A latch circuit is coupled between the power voltage and the output terminal to preserve the voltage level of the output terminal when the logic cell operates in standby mode.

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“Design and Implementation of Differential Cascode Voltage Switch with Pass-Gate (DCVSPG) Logic for High-Performance Digital Systems” Lai et al., 1997; pp. 563-573, no month.

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