Circuit for lines with multiple drivers

Details Circuit for lines with multiple drivers Circuit for lines with multiple drivers

2005-02-22

2005-02-22

Mai, Son (Department: 2818)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189020, C326S086000, C326S087000, C327S108000

Reexamination Certificate

active

06859402

ABSTRACT:
An apparatus may include at least a first transistor, a second transistor, and a circuit. The first transistor has a first control terminal coupled to receive a first dynamic data signal, and is coupled to a first node. The first transistor drives a first state on the first node responsive to an assertion of the first dynamic data signal. The second transistor is coupled to the first node and has a second control terminal. The second transistor is drives a second state on the first node responsive to a signal on the second control terminal. The circuit is coupled to generate the signal on the second control terminal and is coupled to receive a second dynamic data signal. The second dynamic data signal is a complement of the first dynamic data signal, wherein the circuit is activates the second transistor responsive to an assertion of the second dynamic data signal.

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