Circuit for detecting refresh address signals of a semiconductor

Details Circuit for detecting refresh address signals of a semiconductor Circuit for detecting refresh address signals of a semiconductor

1993-04-22

1994-03-29

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Data refresh

365201, 3652335, G11C 700

Patent

active

052991687

ABSTRACT:
Disclosed is a refresh address test circuit of a semiconductor memory device having a self-refresh function using a plurality of internal refresh address signals, comprising a plurality of the address test paths, each including a first sub-path which receives an initial logic level of one bit of an initial refresh address and a second sub-path of which receives successive corresponding bits of said refresh address, a plurality of comparators, each connected to the first sub-path and the second sub-path, a test output circuit receives the output signals generated from the plurality of comparators to determine whether a complete cycle of refresh addresses have been generated.

REFERENCES:
patent: 4672583 (1987-06-01), Nakaizumi
patent: 4758992 (1988-07-01), Taguchi
patent: 4807196 (1989-02-01), Mizukami

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