Circuit for compensating for the declination of balanced...

Details Circuit for compensating for the declination of balanced... Circuit for compensating for the declination of balanced...

2006-09-12

2006-09-12

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S086000, C326S087000

Reexamination Certificate

active

07106095

ABSTRACT:
Provided is a circuit for compensating for the declination of balanced impedance elements and a frequency mixer. The compensation circuit compensates for a difference between impedance measured at first and second impedance elements, and comprises first and second impedance circuits. The first impedance circuit transforms a first impedance value into a fine impedance value having 2nsteps in response to n lower bits of a control signal having k bits. The second impedance circuit transforms a second impedance value into a coarse impedance value having 2msteps in response to m upper bits of the control signal. The first and second impedance values are measured at the first and second impedance elements, respectively, and k is equal to m plus n. The impedance difference between the impedance elements is linearly regulated.

REFERENCES:
patent: 6590438 (2003-07-01), Manku et al.
patent: 6785530 (2004-08-01), Hatcher et al.
patent: 2004/0137870 (2004-07-01), Kivekas et al.
patent: 1020010064042 (2001-07-01), None
patent: WO 02/080384 (2002-10-01), None

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