Circuit calibrating output driving strength of DRAM and...

Details Circuit calibrating output driving strength of DRAM and... Circuit calibrating output driving strength of DRAM and...

2005-10-25

2005-10-25

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including signal comparison

C365S189050, C365S189110

Reexamination Certificate

active

06958942

ABSTRACT:
A circuit for calibrating the output driving strength of a DRAM and method thereof is provided. A driving strength auto-compensation circuit is used to adjust the resistance value of an output generator inside a memory control chip and match with the target output driving strength of the DRAM. Hence, the input comparator of the memory control chip can be directly used to read from the DRAM and generate an output value so that extra high gain comparators are not required for accurately calibrating the output driving strength of the DRAM. Furthermore, the circuit is easy to implement and the calibrating process can be easily performed.

REFERENCES:
patent: 6445316 (2002-09-01), Hsu et al.
patent: 6885959 (2005-04-01), Salmon et al.
patent: 6898724 (2005-05-01), Chang

Affiliated with

Also associated with

Rating

Circuit calibrating output driving strength of DRAM and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit calibrating output driving strength of DRAM and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit calibrating output driving strength of DRAM and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3464560