Circuit arrangement for suppressing magnetic induction noise due

Details Circuit arrangement for suppressing magnetic induction noise due Circuit arrangement for suppressing magnetic induction noise due

1976-02-03

1979-04-24

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365 2, 365170, 329200, G11C 702

Patent

active

041516087

ABSTRACT:
A third conductor is added to a pair of first and second parallel conductors transmitting signals, a part of which conductors are located in an alternating magnetic field. The three conductors are so arranged that the first and third conductors are symmetrical with respect to the center line of the second conductor, and the first and third conductors are interconnected at both extremities thereof.

REFERENCES:
patent: 3484766 (1969-12-01), Constantinides et al.
patent: 3739361 (1973-06-01), Ishikawa
American Institute of Physics-- "Reliability of Organization of a 10.sup.8 Bit Bubble Domain Memory", No. 5, 1971.

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