Circuit and method of generating a boosted voltage in a...

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

Reexamination Certificate

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C365S226000

Reexamination Certificate

active

07548469

ABSTRACT:
A circuit generates a boosted voltage in a semiconductor memory device, where the semiconductor memory device includes a memory cell array having a plurality of non-edge sub-arrays and at least one edge sub-array. The circuit includes a plurality of boosted voltage generators configured to generate a boosted voltage having different current driving capabilities to activate the non-edge sub-arrays and the edge sub-arrays and to supply the boosted voltage to the memory cell array.

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patent: 6545918 (2003-04-01), Song
patent: 6768692 (2004-07-01), Luk et al.
patent: 6804150 (2004-10-01), Park et al.
patent: 6809573 (2004-10-01), Kim
patent: 7054211 (2006-05-01), Tsujimura et al.
patent: 102030009082 (2003-01-01), None

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