Circuit and method for write recovery control

Details Circuit and method for write recovery control Circuit and method for write recovery control

1997-11-26

1998-10-06

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Signals

365190, 36518901, G11C 700

Patent

active

058187707

ABSTRACT:
The present invention relates to a circuit and method for write recovery control for suppressing malfunctions during a write recovery operation. The circuit is for use in a semiconductor memory device including a plurality of memory cells connected in a matrix form to a plurality of word lines and paired bit lines. The circuit comprises a variable load circuit connected to the bit lines, for controlling the voltage level of the bit lines in response to a write enable signal, a word line selector for selecting a predetermined word line in response to an input address, and a delay controller for providing a delay control signal to the word line selector so as to delay activation of the word line selector during the write recovery operation.

REFERENCES:
patent: 4905192 (1990-02-01), Nogami et al.
patent: 5357479 (1994-10-01), Matsui
patent: 5515326 (1996-05-01), Hirose et al.

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