Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2011-05-31
2011-05-31
Nguyen, Dang T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S226000, C365S203000
Reexamination Certificate
active
07952939
ABSTRACT:
Circuit and methods for providing the CVDD supply to the cells in an SRAM array while maintaining a desired VDD voltage. A circuit is described for tracking the VDD supply voltage and providing a CVDD supply for the SRAM cells that maintains an offset above VDD until a maximum voltage for the CVDD voltage is reached. The CVDD voltage supplies the word line drivers and the cells in an SRAM array, while the bit line precharge and the remaining circuitry is operated on the VDD supply. By maintaining a maximum offset between the voltage CVDD and the supply voltage VDD, the SRAM will have the required static noise margins for reliable operation, while a lowered VDD_min voltage may also be obtained. A method for supplying a CVDD voltage to an SRAM cell array is disclosed where the CVDD voltage tracks a VDD supply voltage plus a predetermined offset voltage.
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Chan Wei Min
Chen Yen-Huei
Chou Shao-Yu
Nguyen Dang T
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
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