Circuit and method for reading a memory cell that can store mult

Static information storage and retrieval – Systems using particular element – Ternary

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36518503, 365207, G11C 1156

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active

056732210

ABSTRACT:
A sensing circuit for serial dichotomic sensing of multiple-level memory cells which can take one programming level among a plurality of m=2.sup.n (n>=2) different programming levels, comprises biasing means for biasing a memory cell to be sensed in a predetermined condition, so that the memory cell sinks a cell current with a value belonging to a plurality of m distinct cell current values, each cell current value corresponding to one of the programming levels, a current comparator for comparing the cell current with a reference current generated by a variable reference current generator, and a successive approximation register supplied with an output signal of the current comparator and controlling the variable reference current generator. The variable reference current generator comprises an offset current generator permanently coupled to the current comparator, and m-2 distinct current generators, independently activatable by the successive approximation register, each one generating a current equal to a respective one of the plurality of cell current values.

REFERENCES:
patent: 4809224 (1989-02-01), Suzuki et al.
patent: 4964079 (1990-10-01), Devin
patent: 5012448 (1991-04-01), Matsuoka et al.
Bauer, M., et al., "A Multilevel-Cell 32Mb Flash Memory," Digest of Technical Papers, IEEE International Solid-State Circuits Conference, Feb. 16, 1995, pp. 119, 132-133, 351.
"Mid-Level Current Generator Circuit," IBM.RTM. Technical Disclosure Bulletin 33(1B):386-388, Jun. 1990.

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