Static information storage and retrieval – Read/write circuit – Precharge
Patent
1991-01-23
1993-01-26
Fears, Terell W.
Static information storage and retrieval
Read/write circuit
Precharge
365182, G11C 1140
Patent
active
051827263
ABSTRACT:
A circuit and method for rapid removal of drain-column programming voltages from drain-column lines of a memory array. The circuit includes a resistor/transistor connected between a supply voltage and a common node, the resistor/transistor being enabled by a program enable signal. During the discharge operation, the source-drain paths of a driver transistors of the array connect column lines to reference potential. The gates of the driver transistors are coupled to the common node. An enabling transistor has a source-drain path connecting reference potential to the common node and has a gate connected to the program enable signal. The circuit includes at least one inverter, an OR circuit, and a bypass transistor. The bypass transistor has a source-drain path connected between the supply voltage and the common node and a gate coupled to the common node through the inverter and the OR circuit. The common node may be coupled to the gate of the driver transistor by a coupling transistor having a source-drain path connected between the common node and the gate of the driver transistor and a gate connected to a virtual ground signal.
REFERENCES:
patent: 5075891 (1991-12-01), Yano et al.
patent: 5083047 (1992-01-01), Horie et al.
Schreck John F.
Truong Phat C.
Donaldson Richard L.
Fears Terell W.
Heiting Leo H.
Lindgren Theodore D.
Texas Instruments Incorporated
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