Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1996-12-16
1998-09-08
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
326 57, 326 63, 326 68, G11C 700, H03K 1716
Patent
active
058055053
ABSTRACT:
A circuit converts first and second input signals having first and second active levels, respectively, into an output signal. The circuit includes first and second input terminals, an output terminal and first and second drive terminals. A first stage of the circuit is coupled to the first input terminal, the first drive terminal and the output terminal. The first stage couples a first impedance between the first drive terminal and the output terminal when the first input signal is at the first active level, and reduces the magnitude of the first impedance for a first predetermined time after the first input signal transitions to the first active level. A second stage is coupled to the second input terminal, the second drive terminal and the output terminal, and couples a second impedance between the second drive terminal and the output terminal when the second input signal is at the second active level. The second stage may reduce the magnitude of the second impedance for a second predetermined time after the second input signal transitions to the second active level.
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patent: 5414379 (1995-05-01), Kwon
patent: 5424982 (1995-06-01), Kato
patent: 5432665 (1995-07-01), Hopkins
patent: 5559464 (1996-09-01), Orii
Wright Jeffrey P.
Zheng Hua
Mai Son
Micro)n Technology, Inc.
Nelms David C.
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