Electric lamp and discharge devices: systems – Cathode ray tube circuits – Cathode-ray deflections circuits
Reexamination Certificate
2003-02-06
2004-09-21
Lee, Wilson (Department: 2821)
Electric lamp and discharge devices: systems
Cathode ray tube circuits
Cathode-ray deflections circuits
C315S382100
Reexamination Certificate
active
06794833
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a Cathode Ray Tube (CRT) monitor, and more particularly, to a circuit for controlling a delay of a dynamic focus signal in a CRT monitor.
2. Description of the Related Art
In general, an electron beam emitted from an electron gun has different driving distances to a central portion and an edge portion of a screen. As a result, the focus is not uniform over the entire screen. In particular, the focus at a central portion of the screen is different than the focus at an edge portion of the screen. To overcome this problem, a dynamic focus circuit, which applies different focus voltages to the central portion and to the edge portion of the screen, is required. A signal that is generated by the dynamic focus circuit is called a dynamic focus signal.
A dynamic focus signal is amplified to a relatively high voltage in order to drive a CRT monitor, but the dynamic focus signal is sometimes delayed in the amplification process.
Various kinds of video modes are used for a CRT monitor. Each video mode uses a different frequency. However, in a case where a dynamic focus signal is amplified, a delay time due to the amplification is always the same for all the video modes. Therefore, a complete focusing operation cannot be performed. That is, since a delay time (the delay time is below about 1 us) generated in the process where the dynamic focus signal is amplified is applied to each of the video modes at a different ratio, it is necessary to compensate for a delay time in each video mode individually. This can be a serious problem.
FIG. 1
is a block diagram showing a delay control circuit for controlling delays in a conventional dynamic focus signal. The conventional delay control circuit
100
includes a horizontal deflection transformer
110
, a shaping pulse generating circuit
120
and a selection circuit
130
. The horizontal deflection transformer
110
generates a fly-back signal (SFB). The fly-back signal (SFB) controls the location of an electronic beam on a CRT monitor. The electronic beam moves from the left to the right of the screen in order to output information on the screen of the CRT monitor. When the electronic beam moves to the end of the screen, it moves to the starting point of the screen in order to output the next screen. The signal which controls these movements is referred to as a fly-back signal (SFB).
The fly-back signal (SFB) generated by the horizontal deflection transformer
110
cannot have a shaped pulse form but is generated in a uniformly shaped pulse waveform by the shaping pulse generating circuit
120
.
The selection circuit
130
selects one of the rising edge or the center point of the fly-back signal (SFB
1
) with a shaping pulse form in response to a selection signal (SEL) and generates a delay control signal (DECTRLS).
FIG. 2
is a block diagram of a circuit which generates a dynamic focus signal (DFS) in response to the delay control signal (DECTRLS) of FIG.
1
.
A mono stable circuit
210
converts an input signal into a pulse form. When the delay control signal (DECTRLS) is converted into a pulse waveform by the mono stable circuit
210
and is input to a serration wave generating circuit
220
, the serration wave generating circuit
220
generates serration waves (STS) to generate a dynamic focus signal. The serration wave generating circuit
220
is charged by receiving current from the exterior and is discharged when the delay control signal (DECTRLS) is input. The serration wave generating circuit
220
is discharged by the delay control signal (DECTRLS) and is charged by receiving current from the exterior when a voltage reaches a certain reference level. In this way, a serration wave signal (STS) is output.
The dynamic focus signal generating circuit
230
receives the output signal (STS) of the serration wave generating circuit
220
and generates a dynamic focus signal (DFS) having the form of a parabola. The dynamic focus signal (DFS) can be generated by squaring the output serration wave signal (STS) of the serration wave generating circuit
220
.
FIG. 3
is a waveform diagram showing a relationship between the fly-back signal and the dynamic focus signal.
FIG.
3
(
i
) shows the serration wave signal (STS) and the dynamic focus signal (DFS) in a case where the center of the shaped fly-back signal (SFB
1
) is selected. FIG.
3
(
ii
) shows the serration wave signal (STS) and the dynamic focus signal (DFS) in a case where the rising edge of the shaped fly-back signal (SFB
1
) is selected.
As shown in
FIG. 3
, only a center or a rising edge of the fly-back signal (SFB
1
) is selected as a point at which the dynamic focus signal (DFS) is generated. Therefore, delays which occur when the dynamic focus signal (DFS) is amplified cannot be compensated for accurately.
SUMMARY OF THE INVENTION
To solve the above-described problems, it is an object of the present invention to provide a dynamic focus signal delay control circuit for controlling delays generated in the process where a dynamic focus signal of a CRT monitor is amplified.
It is another object of the present invention to provide a dynamic focus signal delay control method for controlling delays generated in the process where a dynamic focus signal is amplified in a CRT monitor.
To achieve the above object of the present invention, a delay control circuit according to a first embodiment of the present invention includes a pulse center detecting circuit, a first delay control signal generating circuit, and a selection circuit.
The pulse center detecting circuit generates a center detecting signal that indicates a pulse center of a first pulse signal. The first delay control signal generating circuit generates a first delay control signal having a first logic level or a second logic level depending on the result of a comparison of a first comparative signal level generated in a form of a first degree function in response to the first pulse signal with a predetermined second comparative signal level. The selection circuit selects one of the center detecting signal and the first delay control signal in response to a predetermined selection signal and generates the selected signal as a second delay control signal that controls an amount of delay time of the dynamic focus signal.
Preferably, the first delay control signal generating circuit includes a first comparative signal generating circuit and a comparative circuit. The first comparative signal generating circuit responds to the first pulse signal, recognizes a rising edge of the first pulse signal and generates the first comparative signal in a form of a first-degree function. The comparative circuit compares the level of the first comparative signal with that of the second comparative signal. If the level of the first comparative signal is larger than that of the second comparative signal, the comparative circuit generates the first delay control signal having the first logic level. On the other hand, if the level of the first comparative signal is smaller than that of the second comparative signal, the comparative circuit generates the first delay control signal having the second logic level.
The first comparative signal generating circuit includes a charge/discharge circuit which converts the first pulse signal into a current signal in response to the first pulse signal, and a capacitor which generates the first comparative signal with a triangular waveform by using an output current of the charge/discharge circuit.
The second comparative signal is a direct current signal which can be changed between the minimum and maximum levels of the first comparative signal. The center detecting signal is a signal having a phase which is changed from a low level to a high level or from a high level to a low level at a pulse center of the first pulse signal. The first pulse signal is a fly-back signal that controls the position of an electronic beam on a monitor.
The delay control circuit further includes a digital-to-analog converter that generates the sec
Dinh Trinh Vo
Lee Wilson
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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