Circuit and method for a sense amplifier

Details Circuit and method for a sense amplifier Circuit and method for a sense amplifier

2007-04-03

2009-11-03

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S203000, C365S207000, C327S050000, C327S051000

Reexamination Certificate

active

07613057

ABSTRACT:
A circuit and method for providing a sense amplifier for a DRAM memory with reduced distortion in a control signal, the sense amplifier particularly useful for embedding DRAM memory with other logic and memory functions in an integrated circuit. A sense enable circuit is provided for a differential sensing latch in a sense amplifier having a cascade coupled pair of transistors, each transistor receiving a separate control signal. The separate control signals are provided by a control circuit with a delayed overlap. Differential sensing is enabled when the delayed overlap exists between the separate control signals. An array of DRAM memory cells are coupled to a plurality of the sense amplifiers. The DRAM memory incorporating the sense amplifiers may be embedded with other circuitry in an integrated circuit. Methods for providing the control signals and for laying out the DRAM memory with the sense amplifiers are provided.

REFERENCES:
patent: 7019999 (2006-03-01), Srinivasan et al.
patent: 7057957 (2006-06-01), Wang
patent: 7071737 (2006-07-01), Kawasumi et al.
patent: 7304910 (2007-12-01), Hanzawa et al.

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