Chip-stacked semiconductor package and method for...

Details Chip-stacked semiconductor package and method for... Chip-stacked semiconductor package and method for...

2008-01-01

2008-01-01

Lebentritt, Michael (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C438S106000, C257SE23052

Reexamination Certificate

active

07315078

ABSTRACT:
A chip-stacked semiconductor package and a method for fabricating the same are proposed. A chip carrier module plate including a plurality of chip carriers, and a heat sink module plate including a plurality of heat sinks are provided, wherein a plurality of through holes are formed around each of the heat sinks. First chips, the heat sink module plate, and second chips are successively stacked on the chip carrier module plate, wherein the second chips are electrically connected to the chip carrier module plate by conductive wires penetrating the through holes of the heat sink module plate. After a molding process is completed, a singulation process can be performed to separate the chip carriers and the heat sinks, and thus individual semiconductor packages for integrating the heat sinks with the stacked chips are fabricated.

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