Chip select speed-up circuit for a memory

Details Chip select speed-up circuit for a memory Chip select speed-up circuit for a memory

1985-07-01

1986-12-16

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, 365226, 365203, Q11C 1140

Patent

active

046302395

ABSTRACT:
A memory circuit is provided which has a select and a deselect mode. The memory circuit, as part of its technique for quickly accessing data, includes circuitry for generating a pulse in response to detecting an address transition. When the memory circuit switches from the deselect mode to the select mode, these appears to be an address transition even when there is not an address transition. In order to prevent a delay associated with interpreting such false transition as an actual transition, the detection of address transitions is suppressed for a predetermined delay time following the transition from the select to deselect modes.

REFERENCES:
patent: 4344156 (1982-08-01), Eaton, Jr. et al.

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