Chip package without core and stacked chip package structure

Details Chip package without core and stacked chip package structure Chip package without core and stacked chip package structure

2011-04-05

2011-04-05

Pham, Hoai V (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S779000, C257S787000, C257SE23020, C257SE23021

Reexamination Certificate

active

07919874

ABSTRACT:
A chip package including a base, a chip, a molding compound and a plurality of outer terminals is provided. The base is essentially consisted of a patterned circuit layer having a first surface and a second surface opposite to each other and a solder mask disposed on the second surface, wherein the solder mask has a plurality of first openings by which part of the patterned circuit layer is exposed. The chip is disposed on the first surface and is electrically connected to the patterned circuit layer. The molding compound covers the pattern circuit layer and fixes the chip onto the patterned circuit layer. The outer terminals are disposed in the first openings and electrically connected to the patterned circuit layer.

REFERENCES:
patent: 7723853 (2010-05-01), Pan et al.

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