Chip package structure with dual heat sinks

Details Chip package structure with dual heat sinks Chip package structure with dual heat sinks

2006-02-21

2006-02-21

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S706000, C257S678000, C257S701000

Reexamination Certificate

active

07002246

ABSTRACT:
A chip package structure includes a substrate having an upper surface and a lower surface, a chip having an active surface and a back surface, a stiffener, a first heat sink and a second heat sink. The active surface of the chip is attached on the upper surface of the substrate via bumps, so that the chip electrically connects to the substrate. The stiffener is disposed on the upper surface of the substrate and around the chip. The first heat sink is disposed on the back surface of the chip and on the stiffener ring. The second heat sink is disposed on the lower surface of the substrate.

REFERENCES:
patent: 5909056 (1999-06-01), Mertol
patent: 2002/0171144 (2002-11-01), Zhang et al.
patent: 2003/0035269 (2003-02-01), Chiu

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