Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With heat sink means
Patent
1997-11-04
2000-04-04
Graybill, David E.
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With heat sink means
257676, 257706, 257707, H01L 2328
Patent
active
060464968
ABSTRACT:
The present invention relates to a heat management structure within a chip package that allows for heat rejection away from a chip but that avoids the prior art problems of thermal stresses caused by dissimilar thermal conductivities of a heat management structure and of creating a thermally unbalanced package due to disparate distribution of packaging plastic. In an embodiment of the present invention a package includes a chip, leads on the chip, a die attach, a downset, a packaging plastic, and an outer structure among others. The outer structure, downset, and die attach are together a substantially unitary article. Achieving a balanced package that substantially resists warpage and bowing during ordinary manufacture and ordinary use in the life of the package is accomplished by balancing packaging material width and the ability of the downset to resist warpage and bowing stresses. A substantial portion of the outer structure is exposed to the external part of the package in the surface which includes the packaging lower edge. Alternatively, the downset can include a part of the external boundary of the package such that exposure of the downset to the external portion of the package allows for additional heat rejection away from the chip in addition to the use of the outer structure.
REFERENCES:
patent: 5024883 (1991-06-01), SinghDeo et al.
patent: 5172213 (1992-12-01), Zimmerman
patent: 5378924 (1995-01-01), Liang
patent: 5442234 (1995-08-01), Liang
patent: 5483098 (1996-01-01), Joiner, Jr.
patent: 5598034 (1997-01-01), Wakefield
patent: 5714799 (1998-02-01), Okumura
Corisis David
Moden Walter
Graybill David E.
Micron Technology Inc
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