Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-04-08
2004-11-23
Kielin, Erik (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S287000, C438S591000, C438S785000
Reexamination Certificate
active
06821835
ABSTRACT:
FIELD OF THE INVENTION
The instant invention pertains to semiconductor device fabrication and processing and more specifically to a method of fabricating a higher dielectric constant material using a silicate.
BACKGROUND OF THE INVENTION
The trend in semiconductor device processing is to make the devices smaller so that more devices can be fabricated in a given area. This scale down affects substantially all of the device, so that each feature is scaled down. This is particularly problematic for the gate structure and capacitors, because capacitance is proportional to the dielectric constant of the material situated between the two plates of the capacitor and effective area of the dielectric material. In addition, the capacitance of a structure is inversely proportional to the distance between the two electrodes of the structure. Currently, since SiO
2
is the material of choice for gate dielectrics, the thickness of this layer is decreased to compensate for the scaling down of the area of the capacitor. However, this thinning of the oxide layer is becoming problematic for a couple of reasons. First, as the thickness of the silicon dioxide layer is decreased to below about 3 nm, the leakage through the oxide becomes unacceptably high. In addition, the oxide layer ceases to act as an effective barrier with regards to keeping dopants which are implanted into the gate electrode to increase the conductivity of the gate electrode out of the channel regions. Second, extremely thin layers, unless they are formed from a process which is self-limiting, are very difficult to reproducibly fabricate. Third, any etching away of a thin layer, especially a gate insulator, using subsequent processing to etch other structures affects the thinner layer more dramatically than it would a thicker layer because a greater percentage of the thinner layer is removed than that of a thicker layer.
Another approach to solve this problem involves changing the gate insulating material to one with a higher dielectric constant. For example, BST, PZT, TiO
2
and Ta
2
O
5
are being considered for the next generation of gate dielectrics. However, each of these materials pose problems because the processing required to make these materials into effective gate dielectric materials conflicts with the processing of standard transistor structures. More specifically, each of these materials generally require a high temperature anneal in an oxygen-containing ambient, and this anneal can greatly degrade the underlying substrate and any other exposed oxidizable structures.
Hence a new material needs to be used which is relatively easy to process using standard gate structure processing techniques and which has a dielectric constant higher than that of silicon dioxide (&egr;≈3.9).
SUMMARY OF THE INVENTION
Basically, the instant invention involves a gate structure which includes an oxide or a silicate layer as the gate dielectric and a method for fabricating such a structure using chemical vapor deposition (CVD). More specifically, the gate insulator of the instant invention is preferably comprised of ZrSiO
x
or HfSiO
x
(where 0<x<4), or even ZrO
2
or HfO
2
. Preferably, this layer has a dielectric constant of around 10 to 40 (more preferably around 15 to 30). In alternative embodiments, the dielectric layer of the instant invention can be utilized as a capacitor dielectric.
A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the semiconductor substrate; and forming a layer of high-dielectric constant material between the conductive structure and the semiconductor substrate, the layer of high-dielectric constant material is formed by supplying a gaseous silicon source and a second gaseous material which is comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof. In an alternative embodiment, a gaseous oxygen source is also supplied. The method of instant invention may also include the step of: subjecting the electronic device to between 600 and 900 C in an ambient. Preferably, the ambient of the anneal step is comprised of: O
2
, O
3
, N
2
, H
2
, NH
3
, and any combination thereof. The gaseous silicon source is, preferably, comprised of: silane, disilane, dichlorosilane, and any combination thereof, and may also include a carrier gas (preferably comprised of: He, N
2
, Ar, and Ne). Preferably, the second gaseous material is comprised of: Zr(OC
4
H
9
)
4
, Hf(OC
4
H
9
)
4
, Zr(NO
3
)
4
, Hf(NO
3
)
4
, ZrCl
4
, HfCl
4
, ZrI
4
, HfCl
4
, ZrBr
4
, HfBr
4
, Zr
2
(OPri)
6
(tmhd)
2
Hf
2
(OPri)
6
(tmhd)
2
, and any combination thereof. The electronic device may be a capacitor or a transistor. Another embodiment of the instant invention is a method of fabricating a high-dielectric constant material over a semiconductor substrate, the method comprising the steps of: providing a gaseous silicon source in a chamber; providing a second gaseous source in the chamber, the second gaseous source comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof. The method of the instant invention may further comprise the step of: subjecting the high-dielectric constant material to between 600 and 900 C in an ambient. Preferably, the anneal ambient is comprised of: O
2
, O
3
, N
2
, H
2
, NH
3
, and any combination thereof. The gaseous silicon source is, preferably, comprised of: silane, disilane, dichlorosilane, and any combination thereof, and may include a carrier gas (preferably comprised of: He, —N
2
, Ar, and Ne). Preferably, the material is comprised of: Zr(OC
4
H
9
)
4
, Hf(OC
4
H
9
)
4
, Zr(NO
3
)
4
, Hf(NO
3
)
4
, ZrCl
4
, HfCl
4
, ZrI
4
, HfI
4
, ZrBr
4
, HfBr
4
, Zr
2
(OPri)
6
(tmhd)
2
, Hf
2
(OPri)
6
(tmhd)
2
, and any combination thereof. The second gaseous source may include a source of oxygen.
REFERENCES:
patent: 4147615 (1979-04-01), Leas
patent: 4432035 (1984-02-01), Hsieh et al.
patent: 4464701 (1984-08-01), Roberts et al.
patent: 4495219 (1985-01-01), Kato et al.
patent: 5068124 (1991-11-01), Batey et al.
patent: 5384729 (1995-01-01), Sameshima
patent: 5677015 (1997-10-01), Hasegawa
patent: 5686748 (1997-11-01), Thakur et al.
patent: 5744374 (1998-04-01), Moon
patent: 5820664 (1998-10-01), Gardiner et al.
patent: 5834357 (1998-11-01), Kang
patent: 5851921 (1998-12-01), Gardner et al.
patent: 5874766 (1999-02-01), Hori
patent: 5907780 (1999-05-01), Gilmer et al.
patent: 6013553 (2000-01-01), Wallace et al.
patent: 6020243 (2000-02-01), Wallace et al.
patent: 6023124 (2000-02-01), Chuman et al.
patent: 6023125 (2000-02-01), Yoshikawa et al.
patent: 6063677 (2000-05-01), Rodder et al.
patent: 6066922 (2000-05-01), Iwasaki et al.
patent: 6086990 (2000-07-01), Sumino et al.
patent: 6127199 (2000-10-01), Inoue et al.
patent: 6130503 (2000-10-01), Negishi et al.
patent: 6144155 (2000-11-01), Yoshikawa et al.
patent: 6147443 (2000-11-01), Yoshikawa et al.
patent: 6156672 (2000-12-01), Koshido et al.
patent: 6291283 (2001-09-01), Wilk
patent: 6291866 (2001-09-01), Wallace et al.
patent: 6291867 (2001-09-01), Wallace et al.
patent: 6468856 (2002-10-01), Wallace et al.
patent: 6544875 (2003-04-01), Wilk
patent: 5-239650 (1993-09-01), None
patent: 05239650 (1993-09-01), None
patent: WO 98/59366 (1998-12-01), None
Pierson, Handbook of Chemical Vapor Deposition, Noyes Publications: New Jersey, 1992, pp. 229-230, 232-233, 238-242.*
Leedham et al. “Liquid Injection MOCVD of Zirconium Dioxide Using a Novel Mixed Ligand Zirconium Precursor” Chemical Vapor Deposition 4(5), Oct. 1998, Abstract Only.
Wolfe, et al. “Remote Plasma Enhanced-Metal Organic Chemical Vapor Deposition of Zirconium Oxide/Silicon Oxide Alloy, (ZrO2)x-(SiO2)1-x(x<=0.5) Thin Films for Advanced High-K Gate Dielectrics” Abstract Only.
Japanese Patent Abstract for JP 11135774.
EPO Search Report—EP 1 028 458 A3.
S. Roberts, et al., “Deposition and Properties of Ultra-Thin High Dielectric Constant Insulators,” 1987, ASTM Special Tech. Publ. 960 (abst
Brady III W. James
Denker David
Kielin Erik
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Chemical vapor deposition of silicate high dielectric... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Chemical vapor deposition of silicate high dielectric..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chemical vapor deposition of silicate high dielectric... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3331462