Charge restore circuit for semiconductor memories

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365205, 365222, G11C 700

Patent

active

042623421

ABSTRACT:
Disclosed is a circuit for restoring charge to the cells of a semiconductor memory during a read operation. A respective one of the circuits couples to each of the bit lines of the memory. No power is dissipated in those circuits which couple the bit lines that are to be discharged during a read. Also, the circuit includes only three transistors, and thus occupies a minimal amount of chip space. In addition, the circuit is operable in response to only a single clocking signal. Further, the circuit is operable over a relatively large range of precharge voltage levels for the bit lines such as 3 volts to 7 volts.

REFERENCES:
patent: 3806898 (1974-04-01), Askin
patent: 4028557 (1977-06-01), Wilson
patent: 4061999 (1977-12-01), Proebsting et al.
patent: 4130897 (1978-12-01), Horne et al.
patent: 4162416 (1979-07-01), Beecham et al.

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