Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-12-31
1999-07-13
Brown, Peter Toby
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438197, 438301, 438585, 438947, H01L 21336
Patent
active
059239816
ABSTRACT:
A cascading transistor gate structure and method for fabricating the same are disclosed. A substrate is provided, and a layer of gate dielectric material is formed over the substrate. A layer of electrically conductive material is formed over the gate dielectric. A layer of hard mask material is formed on the layer of electrically conductive material. A photoresist mask is used to pattern the layer of hard mask material to form a hard mask. A layer of spacer material is deposited over the existing structures, and the layer of spacer material is etched to form a pair of spacers adjacent to the hard mask. The hard mask is removed, leaving the spacers. The layer of electrically conductive material is etched in alignment with the spacers. The spacers are then removed, revealing two transistor gates. A conductive region in formed in the substrate between the two gates. The two gates operate in tandem, yielding a cascading gate with an effective length that is the lengths of the two gates combined.
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Brown Peter Toby
Intel Corporation
Thomas Toniae M.
Wells Calvin E.
LandOfFree
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