CASB buffer circuit of semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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36523006, G11C 2900

Patent

active

06122202&

ABSTRACT:
Disclosed is a buffer circuit of a semiconductor memory device having input means for receiving an input signal externally applied by an external control signal and output means for outputting the input signal of the input means as a writing control signal through an output means, including: switching means connected to the input means, and for switching the signal transmission from the input means to the output means according to first and second internal control signals; a latch means for latching an output signal from the switching means; and a pulse generator for receiving the output signal of the latch means and the external control signal and outputting the first and second internal control signals for controlling the switching means.

REFERENCES:
patent: 5475646 (1995-12-01), Ogihara
patent: 5568433 (1996-10-01), Kumar
patent: 5627787 (1997-05-01), McClure
patent: 5663917 (1997-09-01), Oka et al.

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