Capping layer for improved silicide formation in narrow...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S751000, C257S758000

Reexamination Certificate

active

06388327

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor devices and manufacturing processes therefor, and more particularly to reduction of resistance in narrow structures in FET devices.
BACKGROUND OF THE INVENTION
In the manufacture of FET devices with polysilicon gates, the ongoing reduction in size of the gates has led to increased resistance of the gate conductor. To overcome this problem, a silicide layer (typically CoSi
2
) is often placed on top of the polysilicon. The addition of the silicide to the narrow polysilicon gate conductor has been shown to be effective in reducing the resistance. In addition, it is known that forming a CoSi
2
layer on other active regions (the source and drain, adjacent to the gate) has a beneficial effect by reducing sheet resistance in those regions. Processes for forming the silicide in a self-aligned fashion are known in the art.
Formation of a cobalt silicide on the gate conductor typically begins with deposition of a Co layer on top of the polysilicon. To prevent oxidation of the cobalt, a capping layer is generally used. Titanium nitride (TiN) is an effective capping layer, serving as an oxygen barrier with good adhesion to the cobalt, while not reacting with the underlying silicon. A typical silicide formation process is shown in
FIGS. 1A
to
1
C. A standard precleaning is performed before deposition to minimize native oxide on the Si surface. As shown in
FIG. 1A
, the silicon gate structure
1
has a cobalt layer
2
deposited thereon; the thickness of the Co layer
2
is about 80 Å.
A TiN capping layer
3
is then deposited on the cobalt; this conventionally is done by sputtering a Ti target using Ar atoms, in a nitrogen atmosphere. Those skilled in the art will appreciate that as the N
2
flow is varied, the target voltage (the voltage between the Ti target and ground) may be measured as a dependent variable. A graph of this relationship is shown in FIG.
2
. Details of the plot of target voltage vs. N
2
flow will, of course, vary with process conditions and between sputtering tools; the voltages and flowrates shown in
FIG. 2
are examples only. There are three distinct regions of N
2
flow, indicated by I, II and III in FIG.
2
:
I. “Non-nitrided” target: too little N
2
is present in the sputtering chamber to form a nitride on the Ti target. Accordingly, pure Ti is sputtered from the target. The Ti may react with N in the chamber to form Ti
x
N
y
(that is, non-stoichiometric TiN) or Ti(N) (that is, Ti with N in solution). The Co surface thus is coated either with pure Ti (which may later react to form TiN), Ti
x
N
y
or Ti(N).
II. Transition region: this region is characterized by plasma instabilities, and is avoided in practice because of the difficulty of controlling the sputtering process.
III. “Nitrided” target: sufficient N
2
is present to form a nitride, Ti
x
N
y
, on the target. The stoichiometry of the nitride formed on the target depends on the N
2
flow actually used. Sputtering this TiN results in grains of TiN being formed on the Si surface; the nitrogen content of the TiN may be further enhanced by the inclusion of N atoms at the grain boundaries. A conventional TiN layer is produced by sputtering in this region of N
2
flow.
It follows that TiN produced with N
2
flow in region III may be characterized as “N-rich” while TiN produced with N
2
flow in region I may be characterized as “N-deficient.”
In the conventional TiN capping layer process, the thickness of the TiN layer is about 200 Å. The Si/Co/TiN structure is then annealed in an inert atmosphere (often N
2
or Ar) at a temperature approximately in the range 480° C. to 570° C., preferably about 540° C. This annealing step causes the cobalt to react with the silicon to produce a layer
4
of cobalt silicide, CoSi, in place of the Co layer (FIG.
1
B). If the Co layer
2
is about 80 Å thick, the thickness of the CoSi layer is generally 200 Å to 300 Å thick. The TiN capping layer may then be stripped away (typically using a sulfuric acid-hydrogen peroxide mixture). A second anneal, at a temperature approximately in the range 680° C. to 750° C., results in formation of a layer
5
of cobalt disilicide on the Si gate
1
(FIG.
1
C). The CoSi
2
is a low resistance conductor and has a thickness slightly greater than of the CoSi layer (300 Å to 400 Å in this example).
Even though a preclean is performed, in practice the surface of the silicon
1
is covered by a native oxide with a thickness typically about 5 Å to 10 Å. This oxide is shown as layer
11
in FIG.
3
A. When the Co layer
2
is deposited on top of the oxide
11
, Co and Si atoms diffuse toward each other through the oxide, as shown schematically in FIG.
3
B. After the first anneal, layers of CoSi
12
,
13
are formed above and below the oxide, respectively (
FIG. 3C
; compare with the idealized picture in FIG.
1
B). The thin native oxide does not interfere with the reaction between the Co and the Si to form the silicide.
As noted above, the conventional TiN in capping layer
3
is generally not truly stoichiometric, but includes additional nitrogen. Nitrogen atoms may thus diffuse out of the capping layer
3
into and through the cobalt layer
2
. In addition, N may be incorporated in the Co layer or at the Co/TiN interface during deposition of the capping layer. Although possible beneficial effects of introducing nitrogen into a self-aligned CoSi
2
are known (for example, improving thermal stability to agglomeration), the involvement of nitrogen in the cobalt silicide formation process has an undesirable effect. Specifically, diffusion of N atoms from the TiN capping layer
3
to the oxide layer
11
(see
FIG. 4A
) may result in formation of an oxynitride layer
21
, which blocks diffusion of Si atoms
10
to the cobalt layer
2
(
FIG. 4B
; compare FIG.
3
B). A thick oxynitride may also inhibit transport of Co atoms. This results in incomplete formation of the CoSi, with a layer
22
of unreacted Co above the oxynitride
21
after the first anneal (
FIG. 4C
; compare FIG.
3
C). This Co layer
22
is stripped away with the TiN capping layer
3
, leaving a thin layer of CoSi. This in turn results in a thin layer
25
of CoSi
2
being formed in the second anneal (FIG.
4
D). Discontinuities in the CoSi
2
layer
25
(that is, incomplete coverage of the Si gate
1
) have been observed.
There is therefore a need for a capping layer for the cobalt metal which in general controls the introduction of N into the cobalt prior to formation of the CoSi
2
, and in particular avoids formation of an oxynitride between the cobalt and silicon, thereby permitting complete formation of the CoSi
SUMMARY OF THE INVENTION
The present invention addresses the above-described need by providing a capping layer for the silicide-forming metal such that nitrogen diffusion therefrom is insufficient to cause formation of an oxynitride from the oxide layer on the silicon.
According to a first aspect of the invention, the capping layer is a metal layer overlying the semiconductor structure and in contact with the silicide-forming metal; this metal layer is composed of tungsten, molybdenum, tantalum or another refractory metal. If the layer is of tungsten, the thickness thereof is approximately in the range 25 Å to 150 Å.
According to another aspect of the invention, the capping layer is a layer of nitride, such as titanium nitride (TiN), overlying the semiconductor structure and in contact with the silicide-forming metal, where the layer has a nitrogen content such that diffusion of nitrogen from that layer through the silicide-forming metal is prevented. Specifically, this nitride layer may be non-stoichiometric TiN deficient in nitrogen. Accordingly, the diffusion of nitrogen from the nitride layer is insufficient to cause formation of an oxynitride at the oxide layer on the silicon surface.
According to another aspect of the invention, the capping layer has a first layer in contact with the silicide-forming metal, and a second layer overly

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