Capacitor of semiconductor memory device and manufacturing metho

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257310, H01L 27108

Patent

active

058474242

ABSTRACT:
A capacitor structure of a DRAM device and a method thereof, including a first electrode formed in each unit memory cell to be connected to a source of a transistor, a deteriorating prevention film formed at the lowermost surface of the first electrode, exclusive of a portion where the first electrode is connected to the source of a transistor, an underlayer formed beneath the deterioration prevention film, an undercut formed between the underlayer and deterioration prevention film, a high-dielectric film formed on surfaces of the first electrode, underlayer and deterioration prevention film which is exposed by the undercut, a reaction/diffusion prevention film formed on the high-dielectric film, formed on the first electrode and underlayer, exclusive of an area around the undercut, and a second electrode formed on the entire surface of the high-dielectric film and reaction/diffusion prevention film, thereby preventing increase of leakage current amount caused by the undercut formed during the capacitor manufacturing process.

REFERENCES:
patent: 5459345 (1995-10-01), Okudaira et al.
patent: 5497016 (1996-03-01), Koh
patent: 5559666 (1996-09-01), Figura et al.
patent: 5567964 (1996-10-01), Kashihara et al.

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