Capacitor-less DRAM device

Details Capacitor-less DRAM device Capacitor-less DRAM device

2009-10-21

2011-11-08

Nguyen, Thinh T (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S347000, C257SE27112, C365S149000, C365S189090

Reexamination Certificate

active

08053832

ABSTRACT:
Provided is a capacitor-less DRAM device including: an insulating layer formed on a semiconductor substrate; a silicon layer formed on the insulating layer, wherein a trench is formed inside the silicon layer; and an offset spacer formed on both sidewalls of the trench and protruded upward through the silicon layer. A gate insulating layer is formed on a bottom of the trench, and a gate electrode is formed to be buried in the gate insulating layer and in the trench and the offset spacer. A source region and a drain region are formed in the silicon layer on both sides of the offset spacer so as not to overlap with the gate electrode. A channel region is formed in the silicon layer below the gate insulating layer to be self-aligned with the gate electrode.

REFERENCES:
patent: 7031203 (2006-04-01), Tang et al.
patent: 7034336 (2006-04-01), Willer
patent: 7211867 (2007-05-01), Hayashi et al.
patent: 2005/0020086 (2005-01-01), Kim et al.
patent: 2006/0220085 (2006-10-01), Huo et al.

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