Cap attach surface modification for improved adhesion

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond

Reexamination Certificate

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Details

C257S750000, C257S758000

Reexamination Certificate

active

06369452

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a structure, and associated method of formation, in which a metal plate is surface treated to facilitate adhesive bonding to the metal plate.
2. Related Art
In an electronic structure, bonding of an electronic assembly (such as a chip) to an electronic carrier (such as a chip carrier or circuit card) is typically characterized by a mismatch in thermal expansion coefficient (CTE) between the electronic assembly and the electronic carrier. As an example, a silicon chip may be adhesively coupled to an organic chip carrier by controlled collapse chip connection (C4) solder balls such that a thermally-cured rigid thermoset material encapsulates the C4 solder balls and mechanically couples the chip to the chip carrier. A silicon chip has a CTE typically in the range of 2 to 3 ppm/° C., while an organic chip carrier has a CTE typically in the range of 17 to 18 ppm/° C. With the organic chip carrier expanding and contracting thermally more than the chip, the mechanically coupled configuration responds to a temperature decrease from the cure temperature (e.g., 130° C.) of the rigid thermoset material by having the organic chip carrier bend concave downward in the direction away from the chip, thereby creating the shape of a “frown” in the chip carrier. Since the chip carrier may have a ball grid array (BGA) on its bottom side for attaching the chip carrier to a circuit card, the chip carrier's downward concavity represents a deviation from planarity that places stresses on the solder balls of the BGA. Such stresses may distort the shape of the BGA solder balls and subject the BGA solder balls to premature fatigue failure from thermal cycling.
A method currently employed to mitigate the aforementioned CTE mismatch problem utilizes a metallic plate (or cap), such as a stainless steel plate, placed in adhesive contact with both the top surface of the electronic assembly (e.g., chip) and the top surface of the electronic carrier (e.g., chip carrier). The adhesive contact may be accomplished by use of a thermally-cured structural adhesive. The arrangement of this method depends on using a metallic plate whose CTE mismatch with the electronic assembly is not very different from the CTE mismatch between the electronic assembly and the electronic carrier. For example, a stainless steel plate having a CTE of about 17 ppm/° C. may be placed in adhesive contact with a silicon chip having a CTE of about 2 to 3 ppm/° C. With the stainless steel plate thermally contracting and expanding more than the chip, the configuration responds to a temperature decrease from the cure temperature (e.g., 130° C.) of the structural adhesive by having the plate bend concave upward in the direction away from the chip, thereby creating the shape of a “smile” in the plate. The mechanical coupling between the plate and the chip, in concert with the mechanical coupling between the chip and the chip carrier, couples the thermal stresses in the plate to the chip carrier. As a result, the chip carrier is subject to oppositely directed stresses of comparable magnitude, namely the stress associated with the smile and the stress associated with the frown. These oppositely directed stresses cancel, leaving the chip carrier in a nearly planar (rather than curved) configuration. Due to the cancellation of opposing stresses, the resulting configuration is like a loaded spring that can “pop” if the plate should separate from the chip. Thus, the adhesion between the metallic plate and the electronic carrier (e.g., chip) must be strong and durable.
Direct adhesive bonding between a stainless steel plate and a silicon chip is not easily accomplished. A current method for facilitating adhesion between a stainless steel plate and a silicon chip includes: chemically cleaning organic debris from the plate surfaces, etching away a thin layer of stainless steel from a surface of the plate to increase surface roughness and promote subsequent adhesion, and adding a layer of an adhesion promoter, such as a silane, to the etched stainless steel surface. Then, the plate is adhesively bonded to both the chip and the chip carrier by use of a structural epoxy adhesive. Unfortunately, the aforementioned method of adhesive bonding does not reliably produce consistent results. In particular, the adhesion promoter leaves gaps in its coverage of the etched stainless steel surface. Additionally, the strength of the chemical bond between the adhesion promoter and the stainless steel surface diminishes with time. As a result, the plate may prematurely delaminate from the epoxy adhesive.
A method is needed for providing strong and durable adhesive coupling between a metallic cap and an electronic carrier.
SUMMARY OF THE INVENTION
The present invention provides an electronic structure, comprising: a metallic plate; a mineral layer bonded to the metallic plate; and an adhesion promoter layer bonded to the mineral layer.
The present invention also provides a method for forming an electronic structure, comprising: providing a metallic plate; forming a mineral layer on the metallic plate; and forming an adhesion promoter layer on the mineral layer.
The present invention has the advantage of providing a strong adhesive bond between a metallic plate and an electronic assembly. The present invention advantageously facilitates consistent and uniform coverage of the metallic plate by the adhesion promoter. The present invention has the added advantage of providing a mechanism for dissipating heat from an electronic assembly.


REFERENCES:
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patent: 4952904 (1990-08-01), Johnson et al.
patent: 4965660 (1990-10-01), Ogihara et al.
patent: 5399805 (1995-03-01), Tyler et al.
patent: 5504372 (1996-04-01), Braden et al.
patent: 5578869 (1996-11-01), Hoffman et al.
patent: 5706579 (1998-01-01), Ross
patent: 5757061 (1998-05-01), Satoh et al.
patent: 5760480 (1998-06-01), You et al.
patent: 6232563 (2001-05-01), Kim et al.
E.P. Plueddemann, Silane Coupling Agents, Plenum Press, 1982 (book).

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