Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-01-04
2011-01-04
Ellis, Kevin L (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S122000, C711S137000
Reexamination Certificate
active
07865666
ABSTRACT:
Cache memory systems and methods thereof are provided. A first example cache memory system may include a central processing unit (CPU) and a first memory, a second memory positioned between the CPU and the first memory and storing at least one block of the first memory and a block quantity determination unit which determines a block quantity indicating a number of blocks of the first memory to be stored in the second memory. A second example cache memory system, including a cache memory receiving a request to provide data associated with an input address, determining whether the input address is included in the cache memory, loading a plurality of adjacent data blocks, associated with the input address, from the main memory if the input address is not included within the cache memory.
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Taiwanese Office Action dated Feb. 19, 2009 with English translation.
Ellis Kevin L
Harness & Dickey & Pierce P.L.C.
Namazi Mehdi
Samsung Electronics Co,. Ltd.
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