Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2000-11-06
2004-05-04
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S130000, C711S137000, C711S147000, C712S237000
Reexamination Certificate
active
06732235
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates generally to small digital signal processor systems, such as mobile phones. The invention relates more specifically to systems in which a digital signal processor executes a software program or sequence of steps, which can be altered, modified or upgraded from time to time.
2. Related Art
Communications equipment, such as mobile phones performs a variety of signal and data processing functions. In older systems, a digital signal processor (DSP) processed digitized audio signals and a microprocessor control unit (MCU) controlled general system operations including communication set-up and tear-down for an individual equipment unit (e.g., phone). The DSP and the MCU of the simplest conventional systems communicate with each other through single-port and multi-port shared memory, control signals, etc. However, additional features and control options are possible when the DSP and MCU are permitted to communicate with each other, for example through a shared memory. Although systems wherein the DSP and the MCU do not communicate with each other are possible, the evolution of cellular communications to include support for digital data communications as well as audio communications has led to a greater need for the DSP and MCU to communicate with each other.
Communication standards also have been evolving and continue to evolve. Standards are often designed to be extensible, or new features cleverly designed to be backward compatible with an existing standard, so that the new features can be deployed to the field without the need to replace every piece of equipment already in the field. In order to accommodate such evolution, there is great pressure to move away from read-only memory (ROM) resident software or firmware to execute on the DSP or MCU. Modifying ROM resident software or firmware is difficult because generally ROM cannot be written to, except once at the time of manufacture.
Ultimately, the above-described pressures have resulted in the development of integrated circuits including a DSP, MCU, ROM and RAM. The monetary and size costs of adding RAM to integrated circuit systems have forced the DSP and MCU to share RAM whenever possible. In order to facilitate communication between the DSP and the MCU, and in order to avoid wasting any memory space, which as noted, is at a premium, they share RAM. System software is loaded into RAM in order to maximize flexibility and the ability to reconfigure systems to stay in conformance with evolving communication standards. However, when memory is shared, for example using the architecture illustrated in
FIG. 1
, the memory access bandwidth becomes a serious problem.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide an improved cache memory system and method, especially, although not exclusively, for a communication processor such as a digital signal processor (DSP).
According to one aspect of the invention, a digital signal processing system comprises a digital signal processor (DSP) performing real-time processing of digital audio signals, a modified non-volatile program storage memory connected through a bus to the DSP, and a cache memory system connected to the DSP and to the modifiable non-volatile program storage memory, the cache memory system having a program memory management unit which loads program instructions from the modifiable non-volatile program storage memory.
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Boutaud Frederic
Krivacek Paul D.
Sørensen Jørn
Analog Devices Inc.
Dinh Ngoc V
Sparks Donald
Wolf Greenfield & Sacks P.C.
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