Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1997-11-18
1999-11-09
Phan, Trong
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36518907, 36523003, G11C 1604, G11C 800
Patent
active
059826754
ABSTRACT:
A memory unit has, for each bit line, a latch circuit for holding data read out of a memory cell until the next access takes place, and a comparator for comparing data to be written into the memory cell and the data held in the latch circuit. If read and write operations consecutively occur at the same address and if some data bits to be written agree with corresponding data bits held in the latch circuits, there is no need of writing data for these bits. Accordingly, the write operation is disabled for these bits and is enabled only for bits that show disagreement between the data to be written and the data stored in the latch circuits. The power consumption of memory cells in a write operation is far greater than that in a read operation. Accordingly, omitting unnecessary write operations in the manner mentioned above greatly reduces the power consumption of the memory unit and the power consumption of a microprocessor that employs the memory unit.
REFERENCES:
patent: 4975872 (1990-12-01), Zaiki
patent: 5453947 (1995-09-01), Seta et al.
patent: 5715426 (1998-02-01), Takahashi et al.
patent: 5825682 (1998-10-01), Fukui
patent: 5845309 (1998-12-01), Shirotori et al.
Kabushiki Kaisha Toshiba
Phan Trong
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