Bypass circuit for word line cell discharge current

Details Bypass circuit for word line cell discharge current Bypass circuit for word line cell discharge current

1982-03-29

1984-12-11

Richardson, Robert L.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, 365242, 365243, 307449, 307463, G11C 1140

Patent

active

044882637

ABSTRACT:
A current bypass for a microelectric memory, such as a static RAM, diverts word line discharge current such that the current does not flow through the memory cells of a selected word line or along an upper word line conductor. In a first embodiment, the bypass comprises a resistor R1 (R2) and a diode D10 (D20) in series and coupled between an upper word line conductor 50 and word line discharge current source V.sub.CC, and a lower word line conductor 51 and word line discharge current sink 42. In another embodiment of the invention, a transistor Q10 (Q20) is used in lieu of the diode. By bypassing current from the upper word line conductor and word line memory cells, metal migration is eliminated and narrower metal lines may be used to form the word lines. By eliminating a flow of steady state discharge current through the memory cells, memory cell current saturation is eliminated.

REFERENCES:
patent: 4349895 (1982-09-01), Isogai

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