Bus maintenance circuit

Details Bus maintenance circuit Bus maintenance circuit

1996-03-15

1997-09-16

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

326 17, 326 82, 326 86, H03K 1704

Patent

active

056684827

ABSTRACT:
A maintenance circuit for a bus (1) with a tristate driver (2) which includes a keeper circuit (3) having a first inverting logic gate (4) with an input connected to the bus (1) and a second inverting logic gate (5) with an input (6) connected to the output of the first logic gate (4). The output of the second logic gate (5) is restricted in current relative to that of tristate driver (2) and is connected directly to the bus (1). The keeper circuit (3) has a control input (7) for disabling positive feedback therein, such that the keeper circuit (3) acts as a pull-up or pull-down circuit.

REFERENCES:
patent: 4598216 (1986-07-01), Lauffer et al.
patent: 4621202 (1986-11-01), Pumo
patent: 4647797 (1987-03-01), Sanwo et al.
patent: 4766334 (1988-08-01), Warner
patent: 5440182 (1995-08-01), Dobbelaere
patent: 5498976 (1996-03-01), Hwang
patent: 5511170 (1996-04-01), Abdoo
patent: 5532630 (1996-07-01), Waggoner et al.

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