Electrical computers and digital data processing systems: input/ – Access arbitrating – Access prioritizing
Reexamination Certificate
2006-08-29
2006-08-29
Myers, Paul R. (Department: 2112)
Electrical computers and digital data processing systems: input/
Access arbitrating
Access prioritizing
Reexamination Certificate
active
07099976
ABSTRACT:
Provided are a bus arbiter and a bus arbitrating method. The bus arbiter comprises a bus request register file, a bank register file, and a comparing circuit, thereby preferentially assigning a bus grant signal to a bus master causing a page hit among a plurality of bus masters outputting bus request signals. The bus request register file stores each of the memory access address output from corresponding bus master. The bank register file stores a page index stored in a sense amplifier of corresponding memory bank of an external memory device. The comparing circuit compares a page index stored in a register of a bank register file selected based on corresponding memory access address with a page index stored in the bus request register file and then outputs a page hit or page miss to the bus request register file according to the comparison result. The bus arbiter preferentially assigns a bus grant signal granting access to the bus to a bus master causing the page hit.
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English Abstract*** of KR 2002 0089428.
F. Chau & Associates LLC
Myers Paul R.
Samsung Electronics Co,. Ltd.
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