Buried plate structure for vertical dram devices

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S532000, C257S534000, C257SE27092

Reexamination Certificate

active

07615816

ABSTRACT:
A buried plate region for a semiconductor memory storage capacitor is self aligned with respect to an upper portion of a deep trench containing the memory storage capacitor.

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S. Wolf et al.; Silicon Processing for the VLSI Era, vol. 1; Lattice Press, California, pp. 307-308, 323-324.

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