Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-09-19
2004-11-16
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S329000, C257S331000, C257S332000, C438S259000, C438S270000, C438S271000, C438S589000
Reexamination Certificate
active
06818947
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor devices and, more particularly, to semiconductor power devices and methods for fabricating such devices.
BACKGROUND OF THE INVENTION
There continues to be a growing demand for power switching devices, i.e., transistor devices capable of carrying large currents at high voltages. Such devices include bipolar and field effect devices including, for example, the Insulated Gate Bipolar transistor (IGBT) and the Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Desirable characteristics of such devices include low on-resistance, fast switching speeds and low current draw during switching operations. That is, it is desirable to switch from an “off” state to an “on” state by applying a bias voltage to the gate electrode while experiencing only a small amount of current flow based on minimal capacitance inherent to the gate structure.
Notwithstanding significant advances in power device technologies, there remains a need to provide still higher-performing and more cost-efficient devices. For example, it is desirable to further increase current density relative to the total die area of a device. One of the limiting factors to higher current ratings is the breakdown voltage, particularly in the edge termination region. That is, because semiconductor junctions are not infinitely parallel, but include curvature, numerous techniques are employed to avoid otherwise high concentrations of electric field lines. Absent inclusion of so-called edge-termination designs, e.g., field rings, channel stop implants and field plates, to overcome degradation in the breakdown voltages, it would not be possible to approach the theoretical breakdown voltage of a semi-infinite junction. However, it is undesirable that, conventionally, a significant portion of the device die area must be devoted to edge termination designs in order to address this problem.
Breakdown voltage phenomena are well understood and the literature is replete with examples of edge termination designs. See, for example, see Ghandhi,
Semiconductor Power Devices
, John Wiley & Sons, Inc., 1977 (ISBN 0-471-029998), incorporated herein by reference, which discusses this subject at chapter two. See, also, Baliga,
Modern Power Devices,
Krieger Publishing Company, Malabar, Fla., 19920 (ISBN0894647997), also incorporated herein by reference, which provides relevant discussion at chapter three. In addition to conventional field rings and field plates, trenched field plates have been considered for edge termination applications. U.S. Pat. No. 5,233,215 discloses use of one or more trenched, floating field plates in combination with field rings in order to terminate a silicon carbide MOSFET. U.S. Pat. No. 5,578,851 discloses field rings separated by trenches, allowing the field rings to be closely spaced in order to conserve area. The trenches may be filled with polysilicon electrically connected to the MOSFET gate electrode. Nonetheless trench termination structures continue to occupy significant portions of the device die area and there is a need to provide termination techniques which are more area efficient. It is also desirable to reduce the manufacturing costs associate with high voltage performance. These and other benefits will be apparent from the invention that is now described.
SUMMARY OF THE INVENTION
An improved semiconductor power device is now provided. In one embodiment of the invention the device includes a semiconductor layer having a transistor region including a source/drain formation and a termination region surrounding the transistor region. The termination region includes an outer periphery corresponding to an edge of the device. A conductor, configured for connection to a voltage supply, includes first and second conductor portions. The first conductor portion is positioned in the transistor region to control current flow through the source/drain formation and the second conductor portion is positioned in the termination region. The second conductor portion includes a contact for connection to the voltage supply and a feed comprising conductive material formed in a trench extending along the outer periphery and around the transistor region. The feed portion electrically connects the contact portion with the first conductor portion.
An exemplary device according to the invention includes a layer of semiconductor material having an active device region and a peripheral region surrounding the active region. A transistor device formed in the active region has a gate region including a gate conductor formed in a trench. The gate conductor is electrically isolated from the semiconductor layer by a relatively thin insulator. A second trench is formed along the peripheral region and includes a second conductor formed therein with a relatively thick insulator positioned to electrically isolate the second trench conductor from the semiconductor layer.
An associated method for manufacturing a semiconductor device includes providing on a layer of semiconductor material an active region and a termination periphery region surrounding the active region with a trenched transistor formation in the active region. A trenched gate runner is formed in the termination region along the active region.
A method for operating a semiconductor device includes providing a semiconductor layer with an active transistor region and a trenched field plate positioned about the transistor region for increasing breakdown voltage. The field plate operates as a conductive feed to control switching of transistors in the active region. As such, the invention reduces the number of elements needed to make a power transistor by combining the gate runners and the field plate into one structure. The invention thus reduces the number of steps needed to make a device. Likewise, it increases the effective useable area of substrate so that substrates made with the invention can handle larger currents.
REFERENCES:
patent: 4876579 (1989-10-01), Davis et al.
patent: 5233215 (1993-08-01), Baliga
patent: 5578851 (1996-11-01), Hshieh et al.
patent: 5605852 (1997-02-01), Bencuya
patent: 5639676 (1997-06-01), Hshieh et al.
patent: 6110763 (2000-08-01), Temple
patent: 6188105 (2001-02-01), Kocon et al.
patent: 6362026 (2002-03-01), Zeng et al.
B. Jayant Baliga, Power Semiconductor Devices, Chapter 3: Breakdown Voltage; Section 3.6, Edge Terminations, pp. 81-112, PWS Publishing Company, Boston, MA, Copyright 1996.
Dolny Gary M.
Grebs Thomas E.
Kocon Christopher B.
Kraft Nathan Lawrence
Ridley, Sr. Rodney S.
Abraham Fetsum
Fairchild Semiconductor Corporation
Law Office of Thomas R. FitzGerald
Roach, Esq. Laurence S.
LandOfFree
Buried gate-field termination structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Buried gate-field termination structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buried gate-field termination structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3276486