Bumped chip package fabrication method and structure

Details Bumped chip package fabrication method and structure Bumped chip package fabrication method and structure

2011-08-09

2011-08-09

Malsawma, Lex (Department: 2892)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S613000, C438S614000

Reexamination Certificate

active

07994045

ABSTRACT:
A method of fabricating a bumped chip package includes forming a first seed layer on a dielectric layer, the dielectric layer comprising a dielectric layer opening exposing a substrate terminal of a substrate, the first seed layer being formed within the dielectric layer opening and on the substrate terminal. A circuit pattern is plated on the first seed layer, wherein an exposed portion of the first seed layer is exposed from the circuit pattern. The exposed portion of the first seed layer is removed by laser-ablation. By using a laser-ablation process, a chemical etching process is avoided thus eliminating the need to treat or dispose of chemical etching hazardous waste. Further, circuit pattern width erosion and undercut of the circuit pattern associated with a chemical etching process are avoided.

REFERENCES:
patent: 6455408 (2002-09-01), Hwang et al.
patent: 7498251 (2009-03-01), Lu
patent: 7847407 (2010-12-01), Watanabe
patent: 2007/0246252 (2007-10-01), Buchwalter et al.
patent: 2009/0098723 (2009-04-01), Yu
patent: 2009/0191665 (2009-07-01), Nikitin et al.

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